1 ltc1710 smbus dual monolithic high side switch n two 0.4 w /300ma n-channel switches n available in ms8 and so-8 packages n smbus and i 2 c compatible n 0.6v v il and 1.4v v ih for data and clk n low standby current: 14 m a n separate drain connection to sw0 n three addresses from one three-state address pin n independent control of up to six switches n built-in power-on reset timer n built-in undervoltage lockout features descriptio n u the ltc ? 1710 smbus dual switch has two built-in 0.4 w / 300ma switches that are controlled by a 2-wire smbus interface. with a low standby current of 14 m a (3.3v), the ltc1710 operates over an input voltage range of 2.7v to 5.5v while maintaining the smbus specified 0.6v v il and 1.4v v ih input thresholds. using the 2-wire interface, clk and data, the ltc1710 follows smbuss send byte protocol to independently control the two 0.4 w internal n-channel power switches, which are fully enhanced by onboard charge pumps. the ltc1710 has one three-state programmable address pin that allows three different addresses for a total of six available switches on the same bus. the ltc1710 also features a separate user-controlled drain supply (sw0d) to switch 0 so that it can be used to control smbus peripherials using a different power supply. , ltc and lt are registered trademarks of linear technology corporation. applicatio n s u n handheld computer power management n computer peripheral control n laptop computer power plane switching n portable equipment power control n industrial control systems n acpi smbus interface typical applicatio n u load current (ma) 0 switch voltage drop (mv) 200 v cc = 3.3v 300 400 1710 ta02 100 0 100 200 300 500 t a = 25 c 400 v cc = 2.7v v cc = 5v switch voltage drop vs load current charge
pump 81 2 10 m f 10 m f 7 5 clock data 6 from smbus 3 ad1
(programmable) 4 1710 ta01 v cc
2.7v to 5.5v sw0d
0v to v cc ltc1710 load 1 sw0 sw1 load 2
2 ltc1710 absolute m axi m u m ratings w ww u (voltages referred to gnd pin) (note 1) input supply voltage (v cc ) .......................... C 0.3v to 6v input supply voltage (v cc ) with sw0 connected as a low side switch ........................... C 0.3v to 3.6v data, clk (bus pins 6, 5)......................... C 0.3v to 6v* ad1 ( address pin 3) ....................... C 0.3v to v cc + 0.3v out0, out1 (output pins 2, 7) ................... C 0.3v to 6v sw0d (switch 0 drain pin 1)....................... C 0.3v to 6v out0, out1 (output pins 2, 7) continuous .................................................... 300ma pulsed, < 10 m s (nonrepetitive) ............................... 1a operating temperature range ltc1710c ................................................ 0 c to 70 c ltc1710i ............................................ C 40 c to 85 c junction temperature** ...................................... 125 c storage temperature range .................. C 65 c to 150 c lead temperature (soldering, 10 sec)................... 300 c *supply rails to data and clk are independent of v cc to ltc1710. **although the ltc1710 can sustain t jmax = 125 c without damage, its internal protection circuitry is set to shut down the switches at t j = 120 c with 15 c hysteresis. electrical characteristics symbol parameter conditions min typ max units v cc operating supply voltage range l 2.7 5.5 v i vcc supply current charge pump off, ad1 high or low, data and clk high v cc = 5v l 17 30 m a v cc = 3.3v l 14 30 m a v cc = 2.7v l 11 30 m a out0 or out1 high (command byte xxxxxx01 or xxxxxx10) l 200 300 m a both outputs high (command byte xxxxxx11) l 250 500 m a r ds(on) power switch on resistance v cc = 2.7v, i out = 300ma 0.55 w v cc = 3.3v, i out = 300ma 0.46 0.7 w v cc = 5v, i out = 300ma 0.40 0.6 w v uvlo undervoltage lockout falling edge (note 2) l 1.5 2.0 2.5 v t por power-on reset delay time v cc = 2.7v (note 3) 300 1000 m s v cc = 5.5v 300 1000 m s f osc charge pump oscillator frequency 300 khz (note 3) t a = 25 c, v cc = sw0d = 5v unless otherwise noted. order part number s8 part marking package/order i n for m atio n w u u consult factory for military grade parts. order part number ms8 part marking ltdz t jmax = 110 c, q ja = 110 c/ w 1
2
3
4 8
7
6
5 top view v cc
out1
data
clk sw0d
out0
ad1
gnd s8 package
8-lead plastic so 1
2
3
4 sw0d
out0
ad1
gnd 8
7
6
5 v cc
out1
data
clk top view ms8 package
8-lead plastic msop t jmax = 110 c, q ja = 150 c/ w 1710 1710i ltc1710cs8 ltc1710is8 ltc1710cms8
3 ltc1710 electrical characteristics t a = 25 c, v cc = sw0d = 5v unless otherwise noted. symbol parameter conditions min typ max units t on output turn-on time v cc = 2.7v (from on (note 6) to v out = 90% v cc ) 200 m s (100 w /1 m f load) v cc = 5.5v (from on (note 6) to v out = 90% v cc ) 160 m s t off output turn-off time v cc = 2.7v (from off (note 7) to v out = 10% v cc ) 250 m s (100 w /1 m f load) v cc = 5.5v (from off (note 7) to v out = 10% v cc ) 250 m s v il data/clk input low voltage v cc = 2.7v to 5.5v l 0.6 v ad1 input low voltage v cc = 2.7v to 5.5v l 0.2 v v ih data/clk high voltage v cc = 2.7v to 5.5v l 1.4 v ad1 input high voltage v cc = 2.7v to 5.5v l v cc C 0.2 v v ol data output low voltage v cc = 2.7v to 5.5v, i pull-up = 350 m a l 0.18 0.4 v c in input capacitance (data, clk, ad1) 5 pf i in input leakage current (data, clk) l 1 m a input leakage current (ad1) l 250 na smbus related specifications (note 5) f smb smbus operating frequency 10 100 khz t buf bus free time between 4.7 m s stop and start t su:sta start condition setup time 4.7 m s t hd:sta start condition hold time 4.0 m s t su:sto stop condition setup time 4.0 m s t hd: dat data hold time 300 ns t su:dat data setup time 250 ns t low clock low period 4.7 m s t high clock high period 4.0 50 m s t f clock/data fall time 300 ns t r clock/data rise time 1000 ns i pull-up current through external pull-up v cc = 2.7v to 5.5v 100 350 m a resistor on data pin (open-drain data pull-down current capacity) the l denotes specifications which apply over the full operating temperature range. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: approximately 3% hysteresis is provided to ensure stable operation and eliminate false triggering by minor v cc glitches. note 3: measured from v cc > v uvlo to smbus ready for data input. note 4: the oscillator frequency is not tested directly but is inferred from turn-on time. note 5: smbus timing specifications are guaranteed but not tested. note 6: on is enabled upon receiving the stop condition from the smbus master. note 7: off is enabled upon receiving the stop condition from the smbus master.
4 ltc1710 typical perfor a ce characteristics uw temperature ( c) ?0 standby current ( m a) 10 100 1710 g01 0 0 50 20 30 40 50 v cc = 3.3v v cc = 5v v cc = 2.7v standby current vs temperature switch r ds(on) vs temperature (so-8 package) temperature ( c) 0 switch r ds(on) ( w ) 0.1 0.3 0.4 0.5 1.0 0.7 ?0 050 1710 g04 0.2 0.8 0.9 0.6 100 v cc = 2.7v v cc = 3.3v v cc = 5v i out = 300ma supply voltage (v) 0 0 supply current ( m a) 100 200 300 400 500 24 1710 g03 68 both sw on sw1 on t a = 25 c sw0 on supply current (i q ) vs supply voltage temperature ( c) data ack v ol (mv) 200 300 100 1710 g06 100 0 ?0 0 50 400 i pull-up = 350 m a temperature ( c) ?0 supply current ( m a) 100 100 1710 g02 0 0 50 200 300 400 500 both sw on sw1 on v cc = 5v sw0 on supply current (i q ) vs temperature switch r ds(on) vs temperature (msop package) temperature ( c) 0 switch r ds(on) ( w ) 0.6 0.8 1.0 80 1710 g05 0.4 0.2 0.5 0.7 0.9 0.3 0.1 0 20 40 60 100 v cc = 2.7v v cc = 5v v cc = 3.3v i out = 300ma data ack v ol vs temperature pi n fu n ctio n s uuu sw0d (pin 1): drain supply of switch 0. user-program- mable from 0v to v cc . out0 (pin 2): source output of switch 0. maximum load of 300ma; controlled by lsb of command byte. ad1 (pin 3): three-state programmable address pin. must be connected directly to v cc , gnd or v cc /2 (using two resistors 1m). do not float this pin. gnd (pin 4): ground connection. clk (pin 5): serial clock interface. must be pulled high to v cc with external resistor. the pull-up current must be limited to 350 m a. data (pin 6): open-drain connected serial data inter- face. must be pulled high to v cc with external resistor. the pull-up current must be limited to 350 m a. out1 (pin 7): source output of switch 1. maximum load of 300ma; controlled by 2nd lsb of command byte. v cc (pin 8): input supply voltage. operating range from 2.7v to 5.5v.
5 ltc1710 block diagra w v cc v cc out1 7 1 2 sw0d out0 4 gnd 1710 bd undervoltage
lockout power-on
reset 2v v cc ack a b output
latches shift
register address
decoder counter input
buffers thermal
shutdown regulated
charge
pumps address
comparator logic start
and
stop
detectors 3 ad1 5 clk 6 8 data ti i g diagra u w
w clk data start stop 1710 td t su:sto t low t high t hd:dat t su:dat t hd:sta t su:sta t f t r operatio u smbus operation smbus is a serial bus interface that uses only two bus lines, data and clk, to control low power peripheral devices in portable equipment. it consists of masters, also known as hosts, and slave devices. the master of the smbus is always the one to initiate communications to the slave devices by varying the status of the data and clk lines. the smbus specification establishes a set of protocols that devices on the bus must follow for communications. the protocol that the ltc1710 uses is the send byte pro- tocol. in this protocol, the master first sends out a start signal by switching the data line from high to low while clk is high. (because there may be more than one master on the same bus, an arbitration process takes place if two masters attempt to take control of the data line simulta- neously; the first master that outputs a one while the other master is zero loses the arbitration and becomes a slave itself.) upon detecting this start signal, all slave devices on the bus wake up and prepare to shift in the next byte of data.
6 ltc1710 operatio u the master then sends out the first byte. the first seven bits of this byte consist of the address of the device that the master wishes to communicate with. the last bit indicates whether the command will be a read (logic one) or write (logic zero). because the ltc1710 is a slave device that can only be written to by a master, it will ignore the ensuing commands of the master if it wants to read from the ltc1710, even if the address sent by the master matches that of the ltc1710. after reception of the first byte, the slave device (ltc1710) with the matching address then acknowledges the master by pulling the data line low before the next rising clock edge. by now all other nonmatching slave devices will have gone back to their original standby states to wait for the next start signal. meanwhile, upon receiving the acknowledge from the matching slave, the master then sends out the command byte (see table 1). table 1. switch control table command xxxxxx00 xxxxxx01 xxxxxx10 xxxxxx11 switch 0 sw0 off sw0 on sw0 off sw0 on switch 1 sw1 off sw1 off sw1 on sw1 on after receiving the command byte, the slave device (ltc1710) needs to acknowledge the master again by pulling the data line low on the following clock cycle. the master then ends this send byte protocol by sending the stop signal, which is a transition from low to high on the data line while the clk line is high. valid data is shifted into the output latch on the last acknowledge signal; the output switch will not turn on, however, until the stop signal is detected. this double buffering feature of the output latch allows the user to daisy-chain multiple smbus devices such that their outputs are synchronously executed on the stop signal despite the fact that valid data were loaded into their output latches at different times. an example is shown in figure 1. if somehow either the start or the stop signal is detected in the middle of a byte, the slave device (ltc1710) will regard this as an error and reject all previous data. address the ltc1710 has an address of 10110xx; the five msbs are hardwired, but the two lsbs are programmable by the user with the help of a three-state address pin. refer to table 2 for the pin configurations and their corresponding addresses. table 2. address pin truth table ad1 address gnd 1011000 v cc /2 1011001 v cc 1011010 to conserve standby current, it is preferable to tie the address pins to either v cc or gnd. if three ltc1710s are needed, then the address pin can be tied to the third state of v cc /2 by using two equal value resistors ( 1m), see figure 2. clk data ack 1710 ta03 1
(sw0
on) 1
(sw1
on) 0 0 0 0 0 0 0 0 1 1 0 1 start 0
(programmable) ack 0
(write) stop address byte command byte figure 2. the ltc1710 programmed with address 1011001 start addr1 addr2 command command a start start a a a a a addr3 command execution of data stored in
output latch of devices with
addr1, addr2 and addr3 stop 1710 f01 figure 1. daisy-chain example 5 3 6 4 1 2 1m 5v 8 7 1710 f02 data clk ad1 sw0d out0 v cc ltc1710 out1 gnd load 1 load 2 1m example of send byte protocol to slave address 1011000 turning sw0 and sw1 on
7 ltc1710 operatio u until about 300 m s after v cc crosses the undervoltage lockout threshold (typically 2v). the circuit includes some hysteresis and delay to avoid nuisance resets. once opera- tion begins, v cc must drop below the threshold for at least 100 m s to trigger another por sequence. input threshold anticipating the trend of lower and lower supply voltages, the smbus is specified with a v ih of 1.4v and a v il of 0.6v. while some smbus parts may violate this stringent smbus specification by specifying a higher v ih value for a corre- sponding higher input supply voltage, the ltc1710 meets and maintains the constant smbus input threshold speci- fication throughout the entire supply voltage range of 2.7v to 5.5v. thermal shutdown in the unlikely event that either power switch overheats, a thermal shutdown circuit, which is placed closely to the two switches, will activate and turn off the gate drives to both switches. the thermal shutdown circuit has a thresh- old of 120 c with a 15 c hysteresis. figure 3. low dropout regulator switching a 3.3v/300ma supply figure 4. the ltc1710 switching two different voltage loads information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. charge pump to fully enhance the internal n-channel power switches, an internal charge pump is used to boost the gate drive to a maximum of 6v above v cc . the reason for the maximum charge pump output voltage limit is to protect the internal switches from excessive gate overdrive. a feedback net- work is used to limit the charge pump output once it is 6v above v cc . to prevent the power switches from turning on too fast, an internal current source is placed between the output of the charge pump and the gate of the power switch to control the ramp rate. since the charge pumps are driving just the gates of the internal switches, only a small amount of current is required. therefore, all the charge pump capacitors are integrated onboard. the drain of switch 1 is internally connected to v cc , however, the drain of switch 0 is user controlled through pin 1. in other words, smbus devices using different power supply voltages can be simulta- neously switched by the same ltc1710. power-on reset and undervoltage lockout the ltc1710 starts up with both gate drives low. an internal power-on reset (por) signal inhibits operation typical applicatio n s u the ltc1710, when used with the lt ? 1521-3.3, can switch a regulated 3.3v/300ma supply to a load (figure 3). also, with the help of the lt1304-5, the ltc1710 can be used to make a boost switching regulator with output disconnect and a low standby current of 22 m a (figure 5). 81 2 10 m f 10 m f 7 5 6 from smbus 3 programmable 4 1710 f04 v cc sw0d 5v 3.3v clk data out0 ltc1710 out1 ad1 gnd 3.3v
load 5v
load 8 7 1 10 m f 1 m f 2 5 6 8 5 1 2 from smbus 3 programmable 4 1710 f03 v cc sw0d 5v clk data switched
3.3v out1 ltc1710 v in shdn v out sense lt1521-3.3 out0 ad1 gnd 1.5 m f 3.3v
8 ltc1710 1710f lt/tp 0998 4k ? printed in usa ? linear technology corporation 1998 typical applicatio n s u 81 2 10 m f 7 5 6 from smbus 3 programmable 4 1710 f05 v cc sw0d 3.3v clk data out0 ltc1710 out1 ad1 gnd 34 8 100k lbo 2 1 5 7 v in sw 22 m h* 2200 m f 5v
200ma 1n5817 shdn shutdown gnd sense lt1304-5 lbo lbi *sumida cd54-220 + 100 m f + 499k 604k 3.3v
load linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com part number description comments ltc1304 micropower dc/dc converter low-battery detector active in shutdown ltc1470/ltc1471 single and dual pcmcia protected 3.3v/5v v cc switches current limit ltc1473 dual powerpath tm switch matrix current limit with timer ltc1623 smbus dual high side switch controller uses external switches, two three-state address pins powerpath is a trademark of linear technology corporation. related parts figure 5. switching regulator with low-battery detect using 22 m a of standby current dimensions in inches (millimeters), unless otherwise noted. package descriptio n u ms8 package 8-lead plastic msop (ltc dwg # 05-08-1660) s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) msop (ms8) 1197 * dimension does not include mold flash, protrusions or gate burrs. mold flash,
protrusions or gate burrs shall not exceed 0.006" (0.152mm) per side
** dimension does not include interlead flash or protrusions.
interlead flash or protrusions shall not exceed 0.006" (0.152mm) per side 0.021 0.006
(0.53 0.015) 0 ?6 typ seating
plane 0.007
(0.18) 0.040 0.006
(1.02 0.15) 0.012
(0.30)
ref
0.006 0.004
(0.15 0.102) 0.034 0.004
(0.86 0.102) 0.0256
(0.65)
typ 12 3 4 0.192 0.004
(4.88 0.10) 8 7 6 5 0.118 0.004*
(3.00 0.102) 0.118 0.004**
(3.00 0.102) 1 2 3 4 0.150 ?0.157**
(3.810 ?3.988) 8 7 6 5 0.189 ?0.197*
(4.801 ?5.004) 0.228 ?0.244
(5.791 ?6.197) 0.016 ?0.050
0.406 ?1.270 0.010 ?0.020
(0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010
(0.203 ?0.254) so8 0996 0.053 ?0.069
(1.346 ?1.752) 0.014 ?0.019
(0.355 ?0.483) 0.004 ?0.010
(0.101 ?0.254) 0.050
(1.270)
typ dimension does not include mold flash. mold flash
shall not exceed 0.006" (0.152mm) per side
dimension does not include interlead flash. interlead
flash shall not exceed 0.010" (0.254mm) per side
*
**
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